HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 74

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HD64F3337YCP16

Manufacturer Part Number
HD64F3337YCP16
Description
IC H8 MCU FLASH 60K 84PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
Package
84PLCC
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
74
Interface Type
HIF/I2C/SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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2.5.2
Table 2.5 describes the arithmetic instructions. See figure 2.6 in section 2.5.4, Shift Operations,
for their object codes.
Table 2.5
Instruction
ADD
SUB
ADDX
SUBX
INC
DEC
ADDS
SUBS
DAA
DAS
MULXU
DIVXU
CMP
NEG
Note: * Size: Operand size
42
B: Byte
W: Word
Arithmetic Operations
Arithmetic Instructions
Size*
B/W
B
B
W
B
B
B
B/W
B
Function
Rd
Performs addition or subtraction on data in two general registers, or
addition on immediate data and data in a general register.
Immediate data cannot be subtracted from data in a general register.
Word data can be added or subtracted only when both words are in
general registers.
Rd
Performs addition or subtraction with carry or borrow on byte data in
two general registers, or addition or subtraction on immediate data
and data in a general register.
Rd
Increments or decrements a general register.
Rd
Adds or subtracts immediate data to or from data in a general
register. The immediate data must be 1 or 2.
Rd decimal adjust
Decimal-adjusts (adjusts to packed BCD) an addition or subtraction
result in a general register by referring to the CCR.
Rd
Performs 8-bit
registers, providing a 16-bit result.
Rd
Performs 16-bit
registers, providing an 8-bit quotient and 8-bit remainder.
Rd – Rs, Rd – #imm
Compares data in a general register with data in another general
register or with immediate data. Word data can be compared only
between two general registers.
0 – Rd
Obtains the two’s complement (arithmetic complement) of data in a
general register.
Rs
Rs
#1
#imm
Rs
Rs
Rd
C
Rd
Rd, Rd + #imm
Rd
Rd
Rd
Rd, Rd
8-bit unsigned multiplication on data in two general
8-bit unsigned division on data in two general
Rd
#imm
Rd
C
Rd

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