HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 495
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HD64F3337YCP16
Manufacturer Part Number
HD64F3337YCP16
Description
IC H8 MCU FLASH 60K 84PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Specifications of HD64F3337YCP16
Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
Package
84PLCC
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
74
Interface Type
HIF/I2C/SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Company:
Part Number:
HD64F3337YCP16
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
HD64F3337YCP16V
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COILMASTER
Quantity:
30 000
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HD64F3337YCP16V
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Renesas Electronics America
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Sample Multiple-Block Erase Program: This program uses the following registers.
R0:
R1H: Used to test bits 8 to 15 of R0 stores register read data, and also used for dummy write.
R1L: Used to test bits 0 to 15 of R0.
R2:
R3:
R4:
R5:
R6L: Used for prewrite-verify and erase-verify fail count.
Arbitrary blocks can be erased by setting bits in R0. Write R0 with a word transfer instruction.
A bit map of R0 and a sample setting for erasing specific blocks are shown next.
Example: to erase blocks LB2, SB7, and SB0
R0 is set as follows:
The setting of #a, #b, #c, #d, and #e values in the program depends on the clock frequency. Set #a,
#b, #c, #d, and #e values according to tables 20.9 (1), (2), and 20.10.
MOV.W
MOV.W
Bit
R0
Bit
R0
Setting
Specifies address where address used in prewrite and erase-verify is stored.
Stores address used in prewrite and erase-verify.
Stores last address of block to be erased.
Sets prewrite and erase timing loop counters.
Specifies blocks to be erased (set as explained below), and also stores address used in
prewrite and erase-verify.
LB7 LB6 LB5 LB4 LB3 LB2 LB1 LB0 SB7 SB6 SB5 SB4 SB3 SB2 SB1 SB0
LB7 LB6 LB5 LB4 LB3 LB2 LB1 LB0 SB7 SB6 SB5 SB4 SB3 SB2 SB1 SB0
15
15
0
#H'0481,R0
R0,
14
14
0
Corresponds to EBR1
Corresponds to EBR1
13
13
0
@EBR1
12
12
0
11
11
0
10
10
1
9
9
0
8
8
0
7
7
1
6
6
0
Corresponds to EBR2
Corresponds to EBR2
5
5
0
4
4
0
3
3
0
2
2
0
1
1
0
0
0
1
463
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