HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 434

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HD64F3337YCP16

Manufacturer Part Number
HD64F3337YCP16
Description
IC H8 MCU FLASH 60K 84PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
Package
84PLCC
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
74
Interface Type
HIF/I2C/SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Flowchart for Erasing Multiple Blocks
402
Erase-verify
next block
Address + 1
address
No
Select erase mode (E bit = 1 in FLMCR)
Figure 19.11 Multiple-Block Erase Flowchart
(set bits of blocks to be erased to 1)
Write 0 data to all addresses to be
No
Dummy write to verify address
(flash memory latches address)
Clear EBR bit of erased block
Set top address of block as
Set erase block registers
Select erase-verify mode
Enable watchdog timer
Disable watchdog timer
(EV bit = 1 in FLMCR)
(EBR1 = EBR2 = 0?)
erased (prewrite)
Yes
All blocks erased?
(read data H'FF?)
All erased blocks
Yes
Wait (t
Wait (t
Wait (X) ms
verify address
OK
End of erase
Last address
Clear EV bit
Yes
Clear E bit
verified?
in block?
Verify
Start
n = 1
VS
VS
1) s
2) s
*4
*5
*5
*5
*1
*2
*3
No go
No
Erasing ends
All erased blocks
Yes
Erase error
verified?
n
Notes: *1 Program all addresses to be
Yes
N?
*5
*2 Set the watchdog timer
*3 For the erase-verify dummy
*4 Read the data to be verified
*5 X:
erased by following the
prewrite flowchart.
overflow interval to the value
indicated in table 19.10.
write, write H'FF with a byte
transfer instruction.
with a byte transfer instruction.
When erasing two or more
blocks, clear the bits of erased
blocks in the erase block
register, so that only unerased
blocks will be erased again.
t
t
N:
VS
VS
Erase-verify next block
1: 4 s or more
2: 2 s or more
No
10 ms
3000
No
n + 1
n

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