HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 553

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

21.4.5
There are three modes for protecting flash memory from programming and erasing: software
protection, hardware protection, and error protection. These protection modes are described below.
Software Protection: Software protection can be implemented by setting the SWE bit in flash
memory control register 1 (FLMCR1), and setting erase block register 2 (EBR2). Software
protection prevents transitions to program mode and erase mode even if the P or E bit is set in
FLMCR1.
Details of software protection are shown in table 21.8.
Table 21.8 Software Protection
Item
SWE bit protect
Block protect
Hardware Protection: Hardware protection refers to a state in which programming and erasing of
flash memory is forcibly suspended or disabled. At this time, the flash memory control registers 1
and 2 (FLMCR1, FLMCR2) and erase block register 2 (EBR2) settings are reset.
Details of hardware protection are shown in table 21.9.
Table 21.9 Hardware Protection
Item
Reset and
standby protect
Protect Modes
Description
Clearing the SWE bit to 0 in FLMCR1 sets the
program/erase-protected state for all blocks.
(Execute in on-chip RAM or external memory.)
Individual blocks can be protected from erasing
and programming by erase block register 2
(EBR2). If H'00 is set in EBR2, all blocks are
protected from erasing and programming.
Description
When a reset occurs (including a watchdog timer
reset) or standby mode is entered, FLMCR1,
FLMCR2, and EBR2 are initialized, disabling
programming and erasing. Note that RES input
does not ensure a reset unless the RES pin is
held low until the oscillator settles at power-up, or
for a period equivalent to the RES pulse width
specified in the AC characteristics during
operation.
Program
Yes
—
Program
Yes
Functions
Functions
Erase
Yes
Yes
Erase
Yes
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