HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 370

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

15.2.2
Note: * Only 0 can be written, to clear the flag.
ADCSR is an 8-bit readable/writable register that selects the mode and controls the A/D converter.
ADCSR is initialized to H'00 by a reset and in standby mode.
Bit 7—A/D End Flag (ADF): Indicates the end of A/D conversion.
Bit 7: ADF
0
1
Bit 6—A/D Interrupt Enable (ADIE): Enables or disables the interrupt (ADI) requested at the
end of A/D conversion.
Bit 6: ADIE
0
1
Bit 5—A/D Start (ADST): Starts or stops A/D conversion. The ADST bit remains set to 1 during
A/D conversion. It can also be set to 1 by external trigger input at the ADTRG pin.
Bit 5: ADST
0
1
338
Bit
Initial value
Read/Write
A/D Control/Status Register (ADCSR)
R/(W)*
ADF
Description
Clearing condition:
Cleared by reading ADF while ADF = 1, then writing 0 in ADF
Setting conditions:
Description
A/D end interrupt request (ADI) is disabled
A/D end interrupt request (ADI) is enabled
Description
A/D conversion is stopped
7
0
Single mode: A/D conversion ends
Scan mode: A/D conversion ends in all selected channels
Single mode: A/D conversion starts; ADST is automatically cleared to 0
when conversion ends
Scan mode: A/D conversion starts and continues, cycling among the
selected channels, until ADST is cleared to 0 by software, by a reset, or by
a transition to standby mode
ADIE
R/W
6
0
ADST
R/W
5
0
SCAN
R/W
4
0
CKS
R/W
3
0
R/W
CH2
2
0
CH1
R/W
1
0
(Initial value)
(Initial value)
(Initial value)
CH0
R/W
0
0