HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 555
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HD64F3337YCP16
Manufacturer Part Number
HD64F3337YCP16
Description
IC H8 MCU FLASH 60K 84PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Specifications of HD64F3337YCP16
Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
Package
84PLCC
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
74
Interface Type
HIF/I2C/SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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HD64F3337YCP16V
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21.4.6
All interrupts, including NMI input, should be disabled when flash memory is being programmed
or erased (while the P or E bit is set in FLMCR1) and while the boot program is executing in boot
mode
1. Interrupt occurrence during programming or erasing might cause a violation of the
2. In the interrupt exception handling sequence during programming or erasing, the vector would
3. If an interrupt occurred during boot program execution, it would not be possible to execute the
For these reasons, there are conditions for disabling interrupts in the on-board programming
modes alone, as an exception to the general rule. However, this provision does not guarantee
normal erasing and programming or microcontroller operation.
All requests, including NMI, must therefore be disabled inside and outside the microcontroller
when flash memory is programmed or erased. Interrupts are also disabled in the error protection
state while the P or E bit setting in FLMCR1 is held.
RD: Memory read possible
VF: Verify-read possible
PR: Programming possible
ER: Erasing possible
programming or erasing algorithm, with the result that normal operation could not be assured.
not be read correctly
normal boot mode sequence.
RD VF PR ER FLER = 0
*1
Error occurrence
, to give priority to the program or erase operation. There are three reasons for this:
Program mode
Interrupt Handling during Flash Memory Programming and Erasing
Erase mode
RD VF PR ER FLER = 1
Error protect mode
*2
Figure 21.14 Flash Memory State Transitions
, possibly resulting in microcontroller runaway.
(software standby
Error occurrence
mode)
RD: Memory read not possible
VF: Verify-read not possible
PR: Programming not possible
ER: Erasing not possible
Software standby mode
Software standby mode
RES = 0 or STBY = 0
release
RES = 0 or
STBY = 0
FLMCR1, FLMCR2 (except FLER bit),
EBR2 initialized
RD VF PR ER FLER = 1
RES = 0 or
STBY = 0
Error protect mode
RD VF PR ER FLER = 0
(hardware protection)
(standby)
hardware standby
Reset or
FLMCR1, FLMCR2,
EBR2 initialized
523
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