HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 350

IC SUPERH MPU ROMLESS 256BGA

HD6417750SBP200

Manufacturer Part Number
HD6417750SBP200
Description
IC SUPERH MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750SBP200

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 2.07 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Section 9 Power-Down Modes
Bit 0—Module Stop 0 (MSTP0): Specifies stopping of the clock supply to serial communication
interface channel 1 (SCI) among the on-chip peripheral modules. The clock supply to the SCI is
stopped when the MSTP0 bit is set to 1.
Bit 0: MSTP0
0
1
9.2.2
When bit 6 in the standby control register (STBCR) is set to 1, peripheral module related pins go
to the high-impedance state in standby mode.
• Relevant Pins
SCI related pins
DMA related pins
• Other Information
Rev.7.00 Oct. 10, 2008 Page 264 of 1074
REJ09B0366-0700
The setting in this register is invalid when the above pins are used as port output pins.
For details of pin states, see Appendix E, Pin Functions.
Peripheral Module Pin High Impedance Control
Description
SCI operates
SCI clock supply is stopped
MD0/SCK
MD7/TXD
CTS2
DACK0
DACK1
MD1/TXD2
MD8/RTS2
DRAK0
DRAK1
(Initial value)

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