HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 758
HD6417750SBP200
Manufacturer Part Number
HD6417750SBP200
Description
IC SUPERH MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417750RBP240DV.pdf
(1164 pages)
Specifications of HD6417750SBP200
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 2.07 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750SBP200
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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Section 15 Serial Communication Interface (SCI)
ERI interrupts are handled by the CPU. The DMAC transfers read data to memory or another
peripheral module. This bit specifies enabling or disabling of the RXI interrupt.
Bit 7: EIO
0
1
Bits 6 to 4—Reserved: These bits are always read as 0, and should only be written with 0.
Bit 3—Serial Port Clock Port I/O (SPB1IO): Specifies serial port SCK pin input/output. When
the SCK pin is actually set as a port output pin and outputs the value set by the SPB1DT bit, the
C/A bit in SCSMR1 and the CKE1 and CKE0 bits in SCSCR1 should be cleared to 0.
Bit 3: SPB1IO
0
1
Bit 2—Serial Port Clock Port Data (SPB1DT): Specifies the serial port SCK pin input/output
data. Input or output is specified by the SPB1IO bit (see the description of bit 3, SPB1IO, for
details). When output is specified, the value of the SPB1DT bit is output to the SCK pin. The SCK
pin value is read from the SPB1DT bit regardless of the value of the SPB1IO bit. The initial value
of this bit after a power-on or manual reset is undefined.
Bit 2: SPB1DT
0
1
Bit 1—Serial Port Break I/O (SPB0IO): Specifies the serial port TxD pin output condition.
When the TxD pin is actually set as a port output pin and outputs the value set by the SPB0DT bit,
the TE bit in SCSCR1 should be cleared to 0.
Bit 1: SPB0IO
0
1
Bit 0—Serial Port Break Data (SPB0DT): Specifies the serial port RxD pin input data and TxD
pin output data. The TxD pin output condition is specified by the SPB0IO bit (see the description
of bit 1, SPB0IO, for details). When the TxD pin is designated as an output, the value of the
Rev.7.00 Oct. 10, 2008 Page 672 of 1074
REJ09B0366-0700
Description
When the RIE bit is 1, RXI and ERI interrupts are sent to INTC (Initial value)
When the RIE bit is 1, only ERI interrupts are sent to INTC
Description
SPB1DT bit value is not output to the SCK pin
SPB1DT bit value is output to the SCK pin
Description
Input/output data is low-level
Input/output data is high-level
Description
SPB0DT bit value is not output to the TxD pin
SPB0DT bit value is output to the TxD pin
(Initial value)
(Initial value)
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