HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 873

• Manufacturer Part Number: HD6417750SBP200
• Description: IC SUPERH MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SBP200

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

With the inverse convention type, the logic 1 level corresponds to state A and the logic 0 level to
state Z, and transfer is performed in MSB-first order. The start character data in this case is H'3F.
The parity bit is 0, corresponding to state Z, since even parity is stipulated for the smart card.
Inversion specified by the SINV bit applies only to the data bits, D7 to D0. For parity bit
inversion, the O/E bit in SCSMR1 is set to odd parity mode. (This applies to both transmission and
reception).
17.3.5
Only an internal clock generated by the on-chip baud rate generator can be used as the
transmit/receive clock for the smart card interface. The bit rate is set with the bit rate register
(SCBRR1) and the CKS1 and CKS0 bits in the serial mode register (SCSMR1). The equation for
calculating the bit rate is shown below. Table 17.5 shows some sample bit rates.
If clock output is selected with CKE0 set to 1, a clock with a frequency of 372 times the bit rate is
output from the SCK pin.
Where: N = Value set in SCBRR1 (0 ≤ N ≤ 255)
(Z)
(Z)
B = Bit rate (bits/s)
B =
Clock
1488 × 2
Ds
Ds
A
A
D0
D7
Z
Z
2n – 1
Pck
Figure 17.5 Sample Start Character Waveforms
(a) Direct convention (SDIR = SINV = O/E = 0)
(b) Inverse convention (SDIR = SINV = O/E = 1)
D1
D6
Z
Z
× (N + 1)
D2
D5
A
A
× 10
D3
D4
A
Z
6
D4
D3
A
Z
D5
D2
Z
A
Rev.7.00 Oct. 10, 2008 Page 787 of 1074
D6
D1
A
A
D7
D0
Section 17 Smart Card Interface
A
A
Dp
Dp
Z
Z
(Z)
(Z)
REJ09B0366-0700
State
State