HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 434

IC SUPERH MPU ROMLESS 256BGA

HD6417750SBP200

Manufacturer Part Number
HD6417750SBP200
Description
IC SUPERH MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750SBP200

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 2.07 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750SBP200
Manufacturer:
HITACHI
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Part Number:
HD6417750SBP200
Manufacturer:
RENESAS/瑞萨
Quantity:
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Section 12 Timer Unit (TMU)
Bit 8—Underflow Flag (UNF): Status flag that indicates the occurrence of underflow.
Bit 8: UNF
0
1
Note:
Bits 7 and 6—Input Capture Control (ICPE1, ICPE0) (Channel 2 Only): These bits, provided
in channel 2 only, specify whether the input capture function is used, and control enabling or
disabling of interrupt generation when the function is used.
When the input capture function is used, a data transfer request is sent to the DMAC in the event
of input capture.
When using the input capture function, the TCLK pin must be designated as an input pin with the
TCOE bit in the TOCR register. The CKEG bits specify whether the rising edge or falling edge of
the TCLK signal is used to set the TCNT2 value in the input capture register (TCPR2).
The TCNT2 value is set in TCPR2 only when the TCR2.ICPF bit is 0. When the TCR2.ICPF bit is
1, TCPR2 is not set in the event of input capture. When input capture occurs, a DMAC transfer
request is generated regardless of the value of the TCR2.ICPF bit. However, a new DMAC
transfer request is not generated until processing of the previous request is finished.
Bit 7: ICPE1
0
1
Rev.7.00 Oct. 10, 2008 Page 348 of 1074
REJ09B0366-0700
*
Writing 1 does not change the value.
Bit 6: ICPE0
0
1
0
1
Description
TCNT has not underflowed
[Clearing condition]
When 0 is written to UNF
TCNT has underflowed
[Setting condition]
When TCNT underflows*
Description
Input capture function is not used
Reserved (Do not set)
Input capture function is used, but interrupt due to input capture
(TICPI2) is not enabled
Data transfer request is sent to DMAC in the event of input
capture
Input capture function is used, and interrupt due to input
capture (TICPI2) is enabled
Data transfer request is sent to DMAC in the event of input
capture
(Initial value)
(Initial value)

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