HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 360
HD6417750SBP200
Manufacturer Part Number
HD6417750SBP200
Description
IC SUPERH MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417750RBP240DV.pdf
(1164 pages)
Specifications of HD6417750SBP200
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 2.07 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750SBP200
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
- Current page: 360 of 1164
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Section 9 Power-Down Modes
9.7
9.7.1
Setting the CA pin level low effects a transition to hardware standby mode. In this mode, all
modules other than the RTC stop, as in the standby mode selected using the SLEEP command.
Hardware standby mode differs from standby mode as follows:
1. Interrupts and manual resets are not available;
2. All output pins other than the STATUS pin are in the high-impedance state and the pull-up
3. On the SH7750S, the RTC continues to operate even when no power is supplied to power pins
The status of the STATUS pin is determined by the STHZ bit of STBCR2. See appendix E, Pin
Functions, for details of output pin states.
Operation when a low-level is input to the CA pin when in the standby mode depends on the CPG
status, as follows:
1. In standby mode
2. When WDT is operating when standby mode is exited by interrupt
Note that the level of the CA pin must be kept low while in hardware standby mode.
9.7.2
Hardware standby mode can only be exited by effecting a power-on reset.
Setting the CA pin level high after the RESET pin level has been set low and the SCK2 pin high
starts the clock to oscillate. The RESET pin level should be kept low until the clock has stabilized,
then set high so that the CPU starts the power-on reset exiting procedure.
Note that hardware standby mode cannot be exited using interrupts or a manual reset.
Rev.7.00 Oct. 10, 2008 Page 274 of 1074
REJ09B0366-0700
resistance is off.
other than the RTC power supply pin.
The clock remains stopped and a transition is made to the hardware standby state.
Standby mode is momentarily exited, the CPU restarts, and then a transition is made to
hardware standby mode.
Hardware Standby Mode (SH7750S, SH7750R Only)
Transition to Hardware Standby Mode
Exit from Hardware Standby Mode
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