HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 431
HD6417750SBP200
Manufacturer Part Number
HD6417750SBP200
Description
IC SUPERH MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417750RBP240DV.pdf
(1164 pages)
Specifications of HD6417750SBP200
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 2.07 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750SBP200
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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The TCNT registers for channels 0 to 2 are initialized to H'FFFFFFFF by a power-on or manual
reset, but are not initialized and retain their contents in standby mode. The TCNT registers for
channels 3 and 4 of the SH7750R are initialized to H'FFFFFFFF by a power-on reset, but are not
initialized and retain their contents on a manual reset and in standby mode.
When the input clock is the on-chip RTC output clock (RTCCLK) in channels 0 to 2, TCNT
counts even in module standby mode (that is, when the clock for the TMU is stopped). When the
input clock is the external clock (TCLK) or internal clock (Pck), TCNT contents are retained in
standby mode.
12.2.6
The TCR registers are 16-bit readable/writable registers. There are five TCR registers, one for
each channel.
Each TCR selects the count clock, specifies the edge when an external clock is selected in
channels 0 to 2, and controls interrupt generation when the flag indicating timer counter (TCNT)
underflow is set to 1. TCR2 is also used for channel 2 input capture control, and control of
interrupt generation in the event of input capture.
The TCR registers for channels 0 to 2 are initialized to H'0000 by a power-on or manual reset, but
are not initialized and retain their contents in standby mode. The TCR registers for channels 3 and
4 of the SH7750R are initialized to H'0000 by a power-on reset, but are not initialized and retain
their contents on a manual reset and in standby mode.
Initial value:
Timer Control Registers (TCR)
R/W:
Bit:
R/W
31
1
R/W
30
1
R/W
29
1
· · · · · · · · · · · · ·
Rev.7.00 Oct. 10, 2008 Page 345 of 1074
Section 12 Timer Unit (TMU)
R/W
2
1
REJ09B0366-0700
R/W
1
1
R/W
0
1
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