HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 965

IC SUPERH MPU ROMLESS 256BGA

HD6417750SBP200

Manufacturer Part Number
HD6417750SBP200
Description
IC SUPERH MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750SBP200

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 2.07 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

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Manufacturer
Quantity
Price
Part Number:
HD6417750SBP200
Manufacturer:
HITACHI
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Part Number:
HD6417750SBP200
Manufacturer:
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Quantity:
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21.1
21.1.1
The high-performance user debug interface (H-UDI) is a serial input/output interface supporting a
subset of the JTAG, IEEE 1149.1, IEEE Standard Test Access Port and Boundary-Scan
Architecture. The SH7750R's H-UDI supports boundary-scan, but is used for emulator connection
as well. The functions of this interface should not be used when using an emulator. Refer to the
emulator manual for the method of connecting the emulator. The H-UDI uses six pins (TCK,
TMS, TDI, TDO, TRST, and ASEBRK/BRKACK). The pin functions and serial transfer protocol
conform to the JTAG specifications.
21.1.2
Figure 21.1 shows a block diagram of the H-UDI. The TAP (test access port) controller and
control registers are reset independently of the chip reset pin by driving the TRST pin low or
setting TMS to 1 and applying TCK for at least five clock cycles. The other circuits are reset and
initialized in an ordinary reset. The H-UDI circuit has four internal registers: SDBPR, SDIR,
SDDRH, and SDDRL (these last two together designated SDDR). The SDBPR register supports
the JTAG bypass mode, SDIR is the command register, and SDDR is the data register. SDIR can
be accessed directly from the TDI and TDO pins.
Section 21 High-performance User Debug Interface
Overview
Features
Block Diagram
Section 21 High-performance User Debug Interface (H-UDI)
(H-UDI)
Rev.7.00 Oct. 10, 2008 Page 879 of 1074
REJ09B0366-0700

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