HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 944

• Manufacturer Part Number: HD6417750SBP200
• Description: IC SUPERH MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SBP200

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 20 User Break Controller (UBC)
Bits 5 and 4—Instruction Access/Operand Access Select A (IDA1, IDA0): These bits specify
whether an instruction access cycle or an operand access cycle is used as the bus cycle in the
channel A break conditions.
Bit 5: IDA1
0
1
Bits 3 and 2—Read/Write Select A (RWA1, RWA0): These bits specify whether a read cycle or
write cycle is used as the bus cycle in the channel A break conditions.
Bit 3: RWA1
0
1
Bits 6, 1, and 0—Operand Size Select A (SZA2–SZA0): These bits select the operand size of
the bus cycle used as a channel A break condition.
Bit 6: SZA2
0
1
Legend: *: Don't care
Rev.7.00 Oct. 10, 2008 Page 858 of 1074
REJ09B0366-0700
Bit 1: SZA1
0
1
0
1
Bit 4: IDA0
0
1
0
1
Bit 2: RWA0
0
1
0
1
Bit 0: SZA0
0
1
0
1
0
1
*
Description
Condition comparison is not performed
Instruction access cycle is used as break condition
Operand access cycle is used as break condition
Instruction access cycle or operand access cycle is used as
break condition
Description
Condition comparison is not performed
Read cycle is used as break condition
Write cycle is used as break condition
Read cycle or write cycle is used as break condition
Description
Operand size is not included in break conditions
Byte access is used as break condition
Word access is used as break condition
Longword access is used as break condition
Quadword access is used as break condition
Reserved (cannot be set)
Reserved (cannot be set)
(Initial value)
(Initial value)
(Initial value)