HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 92

• Manufacturer Part Number: HD6417750SBP200
• Description: IC SUPERH MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SBP200

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 1 Overview
Item
Interrupt controller
(INTC)
User break
controller (UBC)
Bus state
controller (BSC)
Rev.7.00 Oct. 10, 2008 Page 6 of 1074
REJ09B0366-0700
Features
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Five independent external interrupts: NMI, IRL3 to IRL0
15-level encoded external interrupts: IRL3 to IRL0
On-chip peripheral module interrupts: Priority level can be set for each
module
Supports debugging by means of user break interrupts
Two break channels
Address, data value, access type, and data size can all be set as break
conditions
Supports sequential break function
Supports external memory access
⎯ 64/32/16/8-bit external data bus
External memory space divided into seven areas, each of up to 64
Mbytes, with the following parameters settable for each area:
⎯ Bus size (8, 16, 32, or 64 bits)
⎯ Number of wait cycles (hardware wait function also supported)
⎯ Connection of DRAM, synchronous DRAM, and burst ROM possible
⎯ Supports fast page mode and DRAM EDO
⎯ Supports PCMCIA interface
⎯ Chip select signals (CS0 to CS6) output for relevant areas
DRAM/synchronous DRAM refresh functions
⎯ Programmable refresh interval
⎯ Supports CAS-before-RAS refresh mode and self-refresh mode
DRAM/synchronous DRAM burst access function
Big endian or little endian mode can be set
by setting space type