HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 15

MCU 3V 0K I-TEMP 100-TQFP

HD6413008VXI25

Manufacturer Part Number
HD6413008VXI25
Description
MCU 3V 0K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413008VXI25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Item
9.7.6 Contention
between TCOR Write
and Input Capture
Figure 9.23 Contention
between TCOR Write
and Input Capture
9.7.7 Contention
between 8TCNT Byte
Write and Increment in
16-Bit Count Mode
(Cascaded Connection)
Figure 9.24 Contention
between 8TCNT Byte
Write and Increment in
16-Bit Count Mode
Page
277
278
Revision (See Manual for Details)
Figure amended
Description amended
If an increment pulse occurs in the T
byte write cycle in 16-bit count mode, the counter write takes
priority and the byte data for which the write was performed is
not incremented. The byte data for which a write was not
performed is incremented. Figure 9.24 shows the timing when
an increment pulse occurs in the T
8TCNT (upper byte). If an increment pulse occurs in the T
state, on the other hand, the increment takes priority.
Figure amended
Input capture signal
8TCNT (upper byte)
Internal write signal
8TCNT (lower byte)
Internal write signal
8TCNT input clock
Address bus
Address bus
8TCNT
TCOR
φ
φ
Rev.4.00 Aug. 20, 2007, Page xiii of xliv
8TCNT (upper byte) byte write cycle
T
T
1
1
N
TCOR write cycle
X
8TCNTH address
X
TCOR address
T
T
2
M
2
2
state of a byte write to
2
or T
3
state of an 8TCNT
N + 1
T
T
3
REJ09B0395-0400
3
X + 1
8TCNT write data
M
2

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