HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 436

• Manufacturer Part Number: HD6413008VXI25
• Description: MCU 3V 0K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413008VXI25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

13. Smart Card Interface
Bit 7
GM
0
1
Bits 6 to 0: These bits operate as in normal serial communication. For details see section 12.2.5,
Serial Mode Register (SMR).
13.2.4
The function of SCR bits 1 and 0 is modified in smart card interface mode.
Bits 7 to 2: These bits operate as in normal serial communication. For details see section 12.2.6,
Serial Control Register (SCR).
Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): These bits select the SCI clock source and
enable or disable clock output from the SCK pin. In smart card interface mode, it is possible to
specify a fixed high level or fixed low level for the clock output, in addition to the usual switching
between enabling and disabling of the clock output.
Bit 7
GM
0
1
Rev.4.00 Aug. 20, 2007 Page 390 of 638
REJ09B0395-0400
Bit
Initial value
Read/Write
Serial Control Register (SCR)
Description
Normal smart card interface mode operation
•
•
GSM mode smart card interface mode operation
•
•
Bit 1
CKE1
0
1
The TEND flag is set 12.5 etu after the beginning of the start bit.
Clock output on/off control only.
The TEND flag is set 11.0 etu after the beginning of the start bit.
Clock output on/off and fixed-high/fixed-low control.
R/W
TIE
7
0
Bit 0
CKE0
0
1
0
1
0
1
R/W
RIE
6
0
Description
Internal clock/SCK pin is I/O port
Internal clock/SCK pin is clock output
Internal clock/SCK pin is fixed at low output
Internal clock/SCK pin is clock output
Internal clock/SCK pin is fixed at high output
Internal clock/SCK pin is clock output
R/W
TE
5
0
R/W
RE
4
0
MPIE
R/W
3
0
TEIE
R/W
2
0
CKE1
R/W
1
0
(Initial value)
(Initial value)
CKE0
R/W
0
0