HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 507

MCU 3V 0K I-TEMP 100-TQFP

HD6413008VXI25

Manufacturer Part Number
HD6413008VXI25
Description
MCU 3V 0K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413008VXI25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
18.2.2
MSTCRH is an 8-bit readable/writable register that controls output of the system clock (φ). It also
controls the module standby function, which places individual on-chip supporting modules in the
standby state. Module standby can be designated for the SCI0, SCI1.
MSTCRH is initialized to H'78 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—φ Clock Stop (PSTOP): Enables or disables output of the system clock (φ).
Bit 7
PSTOP
0
1
Bits 6 to 3—Reserved: These bits cannot be modified and are always read as 1.
Bit 2—Reserved: This bit can be written and read.
Bit 1—Module Standby H1 (MSTPH1): Selects whether to place the SCI1 in standby.
Bit 1
MSTPH1
0
1
Bit
Initial value
Read/Write
Module Standby Control Register H (MSTCRH)
Description
System clock output is enabled
System clock output is disabled
Description
SCI1 operates normally
SCI1 is in standby state
PSTOP
φ clock stop
Enables or disables
output of the system clock
R/W
7
0
6
1
5
1
Reserved bits
4
1
Rev.4.00 Aug. 20, 2007 Page 461 of 638
3
1
R/W
Module standby H1 to H0
These bits select modules
to be placed in standby
2
0
18. Power-Down State
MSTPH1
R/W
REJ09B0395-0400
1
0
(Initial value)
(Initial value)
MSTPH0
R/W
0
0

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