HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 20

• Manufacturer Part Number: HD6413008VXI25
• Description: MCU 3V 0K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413008VXI25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

2.9
Section 3 MCU Operating Modes
3.1
3.2
3.3
3.4
3.5
3.6
Section 4 Exception Handling
4.1
4.2
4.3
4.4
4.5
4.6
Section 5 Interrupt Controller
5.1
Rev.4.00 Aug. 20, 2007 Page xviii of xliv
REJ09B0395-0400
2.8.7
Basic Operational Timing ................................................................................................. 51
2.9.1
2.9.2
2.9.3
2.9.4
Overview........................................................................................................................... 55
3.1.1
3.1.2
Mode Control Register (MDCR) ...................................................................................... 56
System Control Register (SYSCR) ................................................................................... 57
Operating Mode Descriptions ........................................................................................... 60
3.4.1
3.4.2
3.4.3
3.4.4
3.4.5
Pin Functions in Each Operating Mode ............................................................................ 61
Memory Map in Each Operating Mode ............................................................................ 62
3.6.1
Overview........................................................................................................................... 65
4.1.1
4.1.2
4.1.3
Reset.................................................................................................................................. 68
4.2.1
4.2.2
4.2.3
Interrupts........................................................................................................................... 71
Trap Instruction................................................................................................................. 71
Stack Status after Exception Handling.............................................................................. 72
Notes on Stack Usage ....................................................................................................... 73
Overview........................................................................................................................... 75
5.1.1
Power-Down State ............................................................................................... 51
Overview.............................................................................................................. 51
On-Chip Memory Access Timing........................................................................ 51
On-Chip Supporting Module Access Timing ...................................................... 52
Access to External Address Space ....................................................................... 53
Operating Mode Selection ................................................................................... 55
Register Configuration......................................................................................... 56
Mode 1 ................................................................................................................. 60
Mode 2 ................................................................................................................. 60
Mode 3 ................................................................................................................. 60
Mode 4 ................................................................................................................. 60
Modes 5 to 7 ........................................................................................................ 60
Reserved Areas .................................................................................................... 62
Exception Handling Types and Priority............................................................... 65
Exception Handling Operation............................................................................. 65
Exception Vector Table ....................................................................................... 66
Overview.............................................................................................................. 68
Reset Sequence .................................................................................................... 68
Interrupts after Reset............................................................................................ 70
Features................................................................................................................ 75
.......................................................................................... 75
......................................................................................... 65
.................................................................................. 55