HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 73

MCU 3V 0K I-TEMP 100-TQFP

HD6413008VXI25

Manufacturer Part Number
HD6413008VXI25
Description
MCU 3V 0K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413008VXI25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
2.6
2.6.1
The H8/300H CPU has 64 types of instructions, which are classified in table 2.1.
Table 2.1
Function
Data transfer
Arithmetic operations ADD, SUB, ADDX, SUBX, INC, DEC, ADDS, SUBS, DAA, DAS,
Logic operations
Shift operations
Bit manipulation
Branch
System control
Block data transfer
Notes: 1. POP.W Rn is identical to MOV.W @SP+, Rn.
2. Not available in the H8/3008.
3. Bcc is a generic branching instruction.
Instruction Set
Instruction Set Overview
PUSH.W Rn is identical to MOV.W Rn, @–SP.
POP.L ERn is identical to MOV.L @SP+, Rn.
PUSH.L ERn is identical to MOV.L Rn, @–SP.
Instruction Classification
Instruction
MOV, PUSH*
MULXU, MULXS, DIVXU, DIVXS, CMP, NEG, EXTS, EXTU
AND, OR, XOR, NOT
SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL, ROTXR
BSET, BCLR, BNOT, BTST, BAND, BIAND, BOR, BIOR, BXOR,
BIXOR, BLD, BILD, BST, BIST
Bcc*
TRAPA, RTE, SLEEP, LDC, STC, ANDC, ORC, XORC, NOP
EEPMOV
3
, JMP, BSR, JSR, RTS
1
, POP*
1
, MOVTPE*
2
, MOVFPE*
Rev.4.00 Aug. 20, 2007 Page 27 of 638
2
REJ09B0395-0400
Total 64 types
Types
5
18
4
8
14
5
9
1
2. CPU

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