HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 420

MCU 3V 0K I-TEMP 100-TQFP

HD6413008VXI25

Manufacturer Part Number
HD6413008VXI25
Description
MCU 3V 0K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413008VXI25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
12. Serial Communication Interface
In receiving, the SCI operates as follows:
• The SCI synchronizes with serial clock input or output and synchronizes internally.
• Receive data is stored in RSR in order from LSB to MSB.
• When the RDRF flag is set to 1, if the RIE bit is set to 1 in SCR, a receive-data-full interrupt
Rev.4.00 Aug. 20, 2007 Page 374 of 638
REJ09B0395-0400
After receiving the data, the SCI checks that the RDRF flag is 0, so that receive data can be
transferred from RSR to RDR. If this check passes, the RDRF flag is set to 1 and the received
data is stored in RDR. If the checks fails (receive error), the SCI operates as shown in table
12.11.
When a receive error has been identified in the error check, subsequent transmit and receive
operations are disabled.
(RXI) is requested. If the ORER flag is set to 1 and the RIE bit in SCR is also set to 1, a
receive-error interrupt (ERI) is requested.
Figure 12.18 Sample Flowchart for Serial Receiving (2)
Clear ORER flag to 0 in SSR
Overrun error handling
Error handling
<End>
(3)

Related parts for HD6413008VXI25