HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 672

MCU 3V 0K I-TEMP 100-TQFP

HD6413008VXI25

Manufacturer Part Number
HD6413008VXI25
Description
MCU 3V 0K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413008VXI25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Appendix D Pin States
Modes 3 and 4: Figure D.2 is a timing diagram for the case in which RES goes low during an
external memory access in mode 3 or 4. As soon as RES goes low, all ports are initialized to the
input state. AS, RD, HWR, LWR, and CS
The address bus is initialized to the low output level 2.5 φ clock cycles after the low level of RES
is sampled. However, when PA
PB
low. Clock pin P6
Rev.4.00 Aug. 20, 2007 Page 626 of 638
REJ09B0395-0400
3
are used as CS output pins, they go to the high-impedance state at the same time as RES goes
P6
RES
Internal reset
signal
A
CS
AS, RD
(read)
HWR, LWR
(write)
D
(write)
I/O port,
PA
CS
20
15
7
4
0
7
/A
to A
to D
to CS
23
0
0
to PA
1
7
Figure D.2 Reset during Memory Access (Modes 3 and 4)
/φ goes to the output state at the next rise of φ after RES goes low.
6
/A
21
,
4
to PA
Access to external
T
6
1
are used as address bus pins, or when P8
0
memory
go high, and D
T
2
T
3
15
to D
0
go to the high-impedance state.
High impedance
High impedance
H'00000
3
to P8
1
and PB
0
to

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