AT94K05AL-25AJI Atmel, AT94K05AL-25AJI Datasheet - Page 108

• Manufacturer Part Number: AT94K05AL-25AJI
• Description: IC FPSLIC 5K GATE 25MHZ 84PLCC
• Manufacturer: Atmel
• Series: FPSLIC®r

Specifications of AT94K05AL-25AJI

• Core Type: 8-bit AVR
• Speed: 25MHz
• Interface: I²C, UART
• Program Sram Bytes: 4K-16K
• Fpga Sram: 2kb
• Data Sram Bytes: 4K ~ 16K
• Fpga Core Cells: 256
• Fpga Gates: 5K
• Fpga Registers: 436
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• For Use With: ATSTK594 - BOARD FPSLIC DAUGHTER FOR STK500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

108
AT94KAL Series FPSLIC
Table 4-20.
Table 4-21.
Notes:
In the PWM mode, the 8, 9 or 10 least significant OCR1A/OCR1B bits (depends of resolution),
when written, are transferred to a temporary location. They are latched when Timer/Counter1
reaches the value TOP. This prevents the occurrence of odd-length PWM pulses (glitches) in
the event of an unsynchronized OCR1A/OCR1B write. See
example in each mode.
OTC1
CTC1
x
0
0
0
1
1
1
0
0
1
1
(2)
(1)
1. X = A or B
2. x = Don’t care
PWM11
COM1X1
Timer TOP Values and PWM Frequency
Compare1 Mode Select in PWM Mode
0
1
1
0
1
1
0
1
1
1
1
(1)
PWM10
1
0
1
1
0
1
COM1X0
x
0
1
0
1
(2)
PWM Resolution
(1)
10-bit
10-bit
8-bit
9-bit
8-bit
9-bit
Effect on OCX1
Not connected
Cleared on compare match, up-counting. Set on
compare match, down-counting (non-inverted PWM)
Cleared on compare match, down-counting. Set on
compare match, up-counting (inverted PWM)
Cleared on Compare Match, Set on overflow
Set on Compare Match, cleared on overflow
Timer TOP Value
$03FF(1023)
$03FF(1023)
$00FF (255)
$01FF (511)
$00FF (255)
$01FF (511)
Figure 4-33
and
Figure 4-34
Frequency
f
f
f
f
TCK1
TCK1
f
f
TCK1
TCK1
TCK1
TCK1
1138I–FPSLI–1/08
/1022
/2046
/1024
/510
/256
/512
for an