AT94K05AL-25AJI Atmel, AT94K05AL-25AJI Datasheet - Page 179

IC FPSLIC 5K GATE 25MHZ 84PLCC

AT94K05AL-25AJI

Manufacturer Part Number
AT94K05AL-25AJI
Description
IC FPSLIC 5K GATE 25MHZ 84PLCC
Manufacturer
Atmel
Series
FPSLIC®r
Datasheets

Specifications of AT94K05AL-25AJI

Core Type
8-bit AVR
Speed
25MHz
Interface
I²C, UART
Program Sram Bytes
4K-16K
Fpga Sram
2kb
Data Sram Bytes
4K ~ 16K
Fpga Core Cells
256
Fpga Gates
5K
Fpga Registers
436
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
For Use With
ATSTK594 - BOARD FPSLIC DAUGHTER FOR STK500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT94K05AL-25AJI
Manufacturer:
Atmel
Quantity:
10 000
6.5
1138I–FPSLI–1/08
Cell Function
Global Clocks and Set/Reset
GCK Input Buffer
FCK Input Buffer
Clock Column Driver
Clock Sector Driver
GSRN Input Buffer
Global Clock to Output
Fast Clock to Output
AC Timing Characteristics – 3.3V Operation
Delays are based on fixed loads and are described in the notes.
Maximum times based on worst case: V
Minimum times based on best case: V
Maximum delays are the average of t
Clocks and Reset Input buffers are measured from a V
Maximum times for clock input buffers and internal drivers are measured for rising edge delays only.
Parameter
t
(Maximum)
t
(Maximum)
t
(Maximum)
t
(Maximum)
t
(Maximum)
t
(Maximum)
t
(Maximum)
PD
PD
PD
PD
PD
PD
PD
PDLH
CC
Path
pad -> clock
pad -> clock
pad -> clock
pad -> clock
clock -> colclk
clock -> colclk
colclk -> secclk
colclk -> secclk
colclk -> secclk
colclk -> secclk
clock pad -> out
clock pad -> out
clock pad -> out
clock pad -> out
CC
= 3.6V, temperature = 0° C
and t
= 3.0V, temperature = 70° C
PDHL
.
IH
of 1.5V at the input pad to the internal V
AT94K05
AT94K10
AT94K40
AT94K05
AT94K10
AT94K40
AT94K05
AT94K10
AT94K40
AT94K05
AT94K10
AT94K40
AT94K05
AT94K10
AT94K40
AT94K05
AT94K10
AT94K40
AT94K05
AT94K10
AT94K40
Device
AT94KAL Series FPSLIC
12.6
13.4
14.5
12.1
12.7
13.5
-25
1.2
1.5
1.9
0.7
0.8
0.9
1.3
1.8
2.5
1.0
1.0
1.0
5.4
8.2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
IH
Notes
Rising Edge Clock
Rising Edge Clock
Rising Edge Clock
Rising Edge Clock
Rising Edge Clock
Fully Loaded Clock Tree
Rising Edge DFF
20 mA Output Buffer
50 pf Pin Load
Rising Edge Clock
Fully Loaded Clock Tree
Rising Edge DFF
20 mA Output Buffer
50 pf Pin Load
of 50% of V
CC
.
179

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