AT94K05AL-25AJI Atmel, AT94K05AL-25AJI Datasheet - Page 114

• Manufacturer Part Number: AT94K05AL-25AJI
• Description: IC FPSLIC 5K GATE 25MHZ 84PLCC
• Manufacturer: Atmel
• Series: FPSLIC®r

Specifications of AT94K05AL-25AJI

• Core Type: 8-bit AVR
• Speed: 25MHz
• Interface: I²C, UART
• Program Sram Bytes: 4K-16K
• Fpga Sram: 2kb
• Data Sram Bytes: 4K ~ 16K
• Fpga Core Cells: 256
• Fpga Gates: 5K
• Fpga Registers: 436
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• For Use With: ATSTK594 - BOARD FPSLIC DAUGHTER FOR STK500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

4.28.1.1
4.28.1.2
114
AT94KAL Series FPSLIC
Example 1 – Basic Usage
Example 2 – Special Cases
The first example shows an assembly code that reads the port B input value and multiplies this
value with a constant (5) before storing the result in register pair R17:R16.
Note the use of the MOVW instruction. This example is valid for all of the multiply instructions.
Figure 4-36. Valid Register Usage
This example shows some special cases of the MUL instruction that are valid.
Even though the operand is put in the result register pair R1:R0, the operation gives the correct
result since R1 and R0 are fetched in the first clock cycle and the result is stored back in the sec-
ond clock cycle.
in
ldi
mul
movw r17:r16,r1:r0; Move the result to the r17:r16
lds
lds
mul
lds
mul
r16,PINB
r17,5
r16,r17
r0,variableA ; Load r0 with SRAM variable A
r1,variableB ; Load r1 with SRAM variable B
r1,r0
r0,variableA ; Load r0 with SRAM variable A
r0,r0
MUL
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
R30
R31
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
; Read pin values
; Load 5 into r17
; r1:r0 = r17 * r16
; register pair
; r1:r0 = variable A * variable B
; r0:r0 = square(variable A)
MULS
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
R30
R31
FMULSU
MULSU
FMULS
FMUL
R16
R17
R18
R19
R20
R21
R22
R23
1138I–FPSLI–1/08