TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 180
TMPA901CMXBG
Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet
1.TMPA901CMXBG.pdf
(858 pages)
Specifications of TMPA901CMXBG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
Details
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[31:3]
[2:0]
[Description]
a. <memc_cmd>
Bit
2.
transition from Pause to Config is effected by a Config command. Register settings must be
made during the Config state.
allowed. When a read or write is executed, the SDRAM will change from IDLE to ACTIVE.
state at this time varies depending on the immediately preceding command executed on the
SDRAM. If a Read or Write has been executed, the SDRAM will be shifted to ACTIVE. If a
AutoRefresh has been executed, the SDRAM will be shifted to IDLE
Settings of this register can change the DMC state machine. If a previously issued
command for changing the states is being executed, a new command is issued after the
previous command is completed.
The following diagram shows DMC state transitions for Low-power.
When the DMC exits the Reset state, it automatically enters the Config state. The state
When the DMC state is shifted to Ready, reads from and writes to the SDRAM are
When the DMC state is Ready, a Pause command shifts the DMC to Pause. The SDRAM
dmc_memc_cmd_3 (DMC Memory Controller Command Register)
memc_cmd
Symbol
Bit
WO
Reset
Type
POR
config
DMC State Transitions
TMPA901CM-179
Undefined
Reset
Value
Configure
Go
Read as undefined. Write as zero.
Change the memory controller status:
0y000 = Go
0y001 = Sleep
0y010 = Wakeup
0y011 = Pause
0y100 = Configure
Pause
Sleep
Pause
Ready
Low
power
Wakeup
Go
Description
Address
(Note).
(0xF430_0000) + (0x0004)
TMPA901CM
2010-07-29
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