TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 798

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

Read/Write
(HCD)
Read/Write
(HC)
Read/Write
(HCD)
Read/Write
(HC)
bit Symbol
Reset state
bit Symbol
Reset state
[31:12]
[11:0]
Bit
18. HcLSThreshold Register
determine whether to commit to the transfer of a maximum of 8-byte LS packet before EOF.
Neither the Host Controller nor the Host Controller Driver are allowed to change this
value.
The HcLSThreshold register contains an 11-bit value used by the Host Controller to
Mnemonic
－
LST
31
15
30
14
Reserved
Reserved
LSThreshold
29
13
Field name
28
12
27
11
TMPA901CM- 797
0
26
10
1
This field contains a value which is compared to the FrameRemaining
field prior to initiating a low-speed transaction. The transaction is
started only if FrameRemaining is larger than this field. The value is
calculated by HCD with the consideration of transmission and setup
overhead.
25
9
1
24
Reserved
8
0
23
7
0
22
6
0
R/W
LST
R
Address
Function
21
5
1
20
4
0
(0xF450_0000) + (0x0044)
19
3
1
18
2
0
TMPA901CM
2010-07-29
17
1
0
16
0
0