TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 599

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

[31:4]
[3]
[2]
[1]
[0]
[Description]
Bit
a. <I2SRx_OVERFLOW_INTMS>
b. <I2SRx_FIFOFULL>
c.
d. <I2SRx_FIFOFULL>
16. I2SINTMSK (I
The Rx FIFO overflow setting
0y0: Enable
0y1: Disable
The Rx FIFO underflow setting
0y0: Enable
0y1: Disable
<I2SRx_FIFOEMPTY>
The Tx FIFO overflow setting
0y0: Enable
0y1: Disable
The Tx FIFO underflow setting
0y0: Enable
0y1: Disable
I2SRx_OVERFLOW_INTMS
I2SRx_UNDERFLOW_INTM
I2STx_OVERFLOW_INTMS
I2STx_UNDERFLOW_INTM
Bit Symbol
2
S Interrupt Mask Register)
TMPA901CM- 598
R/W
R/W
R/W
R/W
Type
Undefined
0y1
0y1
0y1
0y1
Reset
Value
Read as undefined. Write as zero.
Rx FIFO overflow setting:
0y0: Enable
0y1: Disable
Rx FIFO underflow setting:
0y0: Enable
0y1: Disable
Tx FIFO overflow setting:
0y0: Enable
0y1: Disable
Tx FIFO underflow setting:
0y0: Enable
0y1: Disable
Address
(0xF204_0000) + (0x0054)
Description
TMPA901CM
2010-07-29