TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 33

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

3.2.6 is the data column, and the right column is the instruction column. The data column
and instruction column reference the data register (DR) and the instruction register (IR),
respectively.
The following paragraphs describe each of the controller states. The left column in Figure
Test-Logic-Reset
Run-Test/Idle
Select-DR-Scan
Select-IR-Scan
Capture-DR
When the TAP controller is in the Reset state, the device identification register is
selected by default. The MSB of the boundary scan register is cleared to 0 which
disables the outputs.
The TAP controller remains in this state while TMS is high. If TMS is held low while
the TAP controller is in this state, then the controller moves to the Run-Test/Idle state.
In the Run-Test/Idle state, the IC is put in test mode only when certain instructions
such as a built-in self test (BIST) instruction are present. For instructions that do not
cause any activities in this state, all test data registers selected by the current
instruction retain their previous states.
The TAP controller remains in this state while TMS is held low. When TMS is held
high, the controller moves to the Select-DR-Scan state.
This is a temporary controller state. Here, the IC does not execute any specific
functions.
If TMS is held low when the TAP controller is in this state, the controller moves to the
Capture-DR state. If TMS is held high, the controller moves to the Select-IR-Scan
state.
This is a temporary controller state. Here, the IC does not execute any specific
functions.
If TMS is held low when the TAP controller is in this state, the controller moves to the
Capture-IR state. IF TMS is held high, the controller returns to the Test-Logic-Reset
state.
In this state, if the test data register selected by the current instruction has parallel
inputs, then data is parallel-loaded into the shift portion of the data register. If the test
data register does not have parallel inputs, or if data needs not be loaded into the
selected data register, then the data register retains its previous state.
If TMS is held low when the TAP controller is in this state, the controller moves to the
Shift-DR state. If TMS is held high, the controller moves to the Exit 1-DR state.
TMPA901CM- 32
TMPA901CM
2010-07-29