TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 396

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TMPA901CMXBG

Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet

Specifications of TMPA901CMXBG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPA901CMXBG
Manufacturer:
Toshiba
Quantity:
10 000
Master
Slave
Note: When acknowledge operation is disabled, no acknowledge clock is generated or counted and no acknowledge
Mode
(2) Acknowledge output
signal is output.
Table 3.14.4 I2C0CL and I2C0DA states when acknowledge is enabled
receive the acknowledge signal from the slave receiver.
generate the acknowledge signal.
enabled.
when a general call is received, the slave pulls I2C0DA low during the acknowledge
clock period to generate the acknowledge signal.
releases I2C0DA during the acknowledge clock period to receive the acknowledge
signal from the master receiver.
generate the acknowledge signal.
clock period as explained below.
When acknowledge operation is enabled, I2C0DA changes during the acknowledge
The master transmitter releases I2C0DA during the acknowledge clock period to
The master receiver pulls I2C0DA low during the acknowledge clock period and to
Table 3.14.4 shows the I2C0CL and I2C0DA states when acknowledge operation is
When the received slave address matches the slave address set in I2C0AR<SA> or
In data transfer after a slave address match or a general call, the slave transmitter
The slave receiver pulls I2C0DA low during the acknowledge clock period to
I2C0CL
I2C0DA
I2C0CL
I2C0DA
Master mode
Slave mode
Pin
When a slave address
match is detected or a
general call is received.
During transfer after a
slave address match is
detected or a general call
is received
Condition
TMPA901CM- 395
Adds the acknowledge
clock pulse.
Releases the pin to
receive the acknowledge
signal.
Counts the acknowledge
clock pulse.
Releases the pin to
receive the acknowledge
signal.
Transmitter
Adds the acknowledge
clock pulse.
Pulls the pin low as the
acknowledge signal.
Counts the acknowledge
clock pulse.
Pulls the pin low as the
acknowledge signal.
Pulls the pin low as the
acknowledge signal.
Receiver
TMPA901CM
2010-07-29

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