ATmega168A Atmel Corporation, ATmega168A Datasheet - Page 19

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ATmega168A

Manufacturer Part Number
ATmega168A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega168A

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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8.3
8271D–AVR–05/11
SRAM Data Memory
Figure 8-3
organized.
The ATmega48A/PA/88A/PA/168A/PA/328/P is a complex microcontroller with more peripheral
units than can be supported within the 64 locations reserved in the Opcode for the IN and OUT
instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and
LD/LDS/LDD instructions can be used.
The lower 768/1280/1280/2303 data memory locations address both the Register File, the I/O
memory, Extended I/O memory, and the internal data SRAM. The first 32 locations address the
Register File, the next 64 location the standard I/O memory, then 160 locations of Extended I/O
memory, and the next 512/1024/1024/2048 locations address the internal data SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register
File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O Registers, 160 Extended I/O Registers, and
t h e
ATmega48A/PA/88A/PA/168A/PA/328/P are all accessible through all these addressing modes.
The Register File is described in
Figure 8-3.
5 1 2 / 1 0 2 4 / 1 0 2 4 / 2 0 4 8
shows how the ATmega48A/PA/88A/PA/168A/PA/328/P SRAM Memory is
Data Memory Map
ATmega48A/PA/88A/PA/168A/PA/328/P
(512/1024/1024/2048 x 8)
160 Ext I/O Reg.
64 I/O Registers
Data Memory
Internal SRAM
32 Registers
”General Purpose Register File” on page
b y t e s
o f
i n t e r n a l
0x02FF/0x04FF/0x4FF/0x08FF
0x0000 - 0x001F
0x0020 - 0x005F
0x0060 - 0x00FF
0x0100
d a t a
12.
S R A M
i n
t h e
19

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