TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 163

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
3.9.2
Operation for Each Circuit
(1) SIO Prescaler and prescaler clock select
System clock
<SYSCK>
clock.
selection
SYSCR1
among the prescaler outputs.
1 (fs)
0 (fc)
There is a 6-bit prescaler for waking serial clock.
The prescaler can be run by selecting the baud rate generator as the waking serial
Table 3.9.2 shows prescaler clock resolution into the baud rate generator.
The baud rate generator selects between 4 clock inputs: φT0, φT2, φT8, and φT32
Table 3.9.2 Prescaler Clock Resolution to Baud Rate Generator
<GEAR2:0>
Clock gear
100(1/16)
selection
SYSCR1
000(1/1)
001(1/2)
010(1/4)
011(1/8)
1/8
92CH21-161
fc/128
fc/16
fc/32
fc/64
φT0
fs/8
fc/8
Baud rate generator input clock
BR0CR<BR0CK1:0>
φT2(1/4)
fc/128
fc/256
fc/512
fs/32
fc/32
fc/64
SIO prescaler
φT8(1/16)
fc/1024
fc/2048
fs/128
fc/128
fc/256
fc/512
φT32(1/64)
fc/1024
fc/2048
fc/4096
fc/8192
fs/512
fc/512
TMP92CH21
2009-06-19

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