TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 65

no-image

TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
Port Name
Port G
Port M
Port K
Port L
Port J
PG0 to PG1
PG2
PG3
PJ0
PJ1
PJ2
PJ3
PJ4
PJ5
PJ6
PJ7
PK0
PK1
PK2
PK3
PL0 to PL3
PL4 to PL7
PM1
PM2
Pin Name
(
R: PD = with programmable pull-down resistor, U = with pull-up resistor)
Number
of Pins
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
4
1
1
2
Table 3.5.2 Port Functions (2/2)
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
I/O
I/O
I/O
I/O
92CH21-63
R
I/O Setting
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
Bit
Bit
Bit
Pin Name for Built-in Function
AN0 to AN1
AN2, MX
AN3,
SDLLDQM
SDLUDQM
SDULDQM, NDALE
SDUUDQM, NDCLE
SDCKE
LCP0
LLP
LFR
LBCD
LD0 to LD3
LD4 to LD7
MLDALM
SDRAS
SDCAS
SDWE
ALARM
ADTRG
,
,
,
,
SRWR
SRLLB
SRLUB
MLDALM
, MY
TMP92CH21
2009-06-19

Related parts for TMP92xy21FG