TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 185

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

(4) Mode 3 (9-bit UART mode)
parity bit cannot be added.
case of receiving it is stored in SC0CR<RB8>. When the buffer is written or read,
<TB8>or <RB8> is read or written first, before the rest of the SC0BUF data.
9-bit UART mode is selected by setting SC0MOD0<SM1:0> to 11. In this mode a
In the case of transmission the MSB (9th bit) is written to SC0MOD0<TB8>. In the
Wakeup function
X: Don't care, −: No change
setting SC0MOD0<WU> to 1. The interrupt INTRX0 can only be generated
when<RB8> = 1.
Note: The TXD pin of each slave controller must be in open-drain output mode.
Main settings
PFCR
PFFC
SC0MOD0
SC0CR
BR0CR
INTES0
Interrupt processing
A
if A
A
CC
CC
In 9-bit UART mode, the wakeup function for slave controllers is enabled by
CC
TXD
≠ 0 then ERROR
Figure 3.9.23 Serial Link Using Wakeup Function
Master
← X
← −
← −
← −
← 0
← −
← SC0CR AND 00011100
← SC0BUF
RXD
7
6
X
X
0
0
0
−
5
X
X
1
1
0
−
TXD
92CH21-183
4
X
X
−
−
1
−
Slave1
3
X
X
1
−
1
X
2
−
−
0
−
0
1
RXD
1
0
0
0
0
0
0
0
−
−
1
0
0
0
Set PF1 to function as the RXD0 pin.
Enable receiving in 8-bit UART mode.
Add odd parity.
Set the transfer rate to 9600 bps.
Enable the INTTX0 interrupt and set it to interrupt
level 4.
Check for errors
Read the received data
TXD
Slave 2
RXD
TXD
Slave 3
TMP92CH21
2009-06-19
RXD