TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 9

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
Pin Name
D0 to D7
P10 to P17
D8 to D15
P20 to P27
D16 to D23
KO0 to KO7
P30 to P37
D24 to D31
P40 to P47
A0 to A7
P50 to P57
A8 to A15
P60 to P67
A16 to A23
P70
P71
P72
P73
EA24
P74
EA25
P75
NDR/B
P76
RD
NDRE
NDWE
R/
WRLL
WRLU
WAIT
2.3
W
Pin Names and Functions
The following table shows the names and functions of the input/output pins
Number of
Pins
8
8
8
8
8
8
8
1
1
1
1
1
1
1
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Port 1: I/O port input or output specifiable in units of bits
Data: Data bus 8 to 15
Port 2: I/O port input or output specifiable in units of bits
Data: Data bus 16 to 23
Key output 0 to 7: Pins used of key-scan strobe (Open-drain output programmable)
Port 3: I/O port input or output specifiable in units of bits
Data24: Data bus 24 to 31
Port 4: Output port
Address: Address bus 0 to 7
Port 5: Output port
Address: Address bus 8 to 15
Port 6: I/O port input or output specifiable in units of bits
Address: Address bus 16 to 23
Port70: Output port
Read: Outputs strobe signal to read external memory
Port 71: I/O port
Write: Output strobe signal for writing data on pins D0 to D7
NAND flash read: Outputs strobe signal to read external NAND flash
Port 72: I/O port
Write: Output strobe signal for writing data on pins D8 to D15
Write Enable for NAND flash
Port 73: Output port
Extended Address 24
Port 74: Output port
Extended Address 25
Port 75: I/O port
Read/Write: 1 represents read or dummy cycle; 0 represents write cycle
NAND flash ready (1)/Busy (0) input
Port 76: I/O port
Wait: Signal used to request CPU bus wait
Data: Data bus 0 to 7
Table 2.3.1 Pin Names and Functions (1/5)
92CH21-7
Function
TMP92CH21
2009-06-19

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