TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 421

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

Read-modify
-write
instruction is
prohibited.
TB0MOD
(1182H)
Bit symbol
Read/Write
Reset State
Function
Always write “0”
7
−
0
R/W
Figure 3.18.3 The Registers for TMRB0
6
−
0
TMRB0 Mode Register
Execute
software
capture
0: Software
capture
1:
Undefined
TB0CP0I
W*
92CH21-419
5
1
Capture timing
00: Disable
01: Reserved
10: Reserved
11: TA1OUT↑
TB0CPM1
TMRB0 source clock
Up counter clear control
Capture/interrupt timing
Software capture
TA1OUT↓
4
0
00
01
10
11
00
01
10
11
0
1
0
1
Reserved
φT1
φT4
φT16
Disable
Enable clearing on match with TB0RG1H/L
Disable
Reserved
Capture to TB0CP0H/L at rising edge of TA1OUT
Capture to TB0CP1H/L at falling edge of TA1OUT
The value in the up counter is captured to
TB0CP0H/L.
Undefined
Reserved
TB0CPM0
3
0
Control
up counter
0: Disable
1: Enable
TB0CLE
clearing
clearing
R/W
2
0
TMRB0 source clock
00: Reserved
01: φT1
10: φT4
11: φT16
TB0CLK1
1
0
TMP92CH21
2009-06-19
TB0CLK0
0
0