TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 399

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
3.17.3
3.17.3.1 Accessing NAND-Flash Memory
Operation Description
registers. It also contains the ECC calculating circuits. Please see 3.17.3.2 for details
of the ECC. This section explains the operations for accessing the NAND Flash.
read cycle for ND0FDTR is completed after the external read cycle for the
NAND-Flash is finished. Likewise, the write cycle for ND0FDTR is completed after
the external write cycle for the NAND-Flash is finished.
1)
2)
The NDFC accesses data on NAND Flash memory indirectly through its internal
Basically, set the command in ND0FMCR and then read or write to ND0FDTR. The
Initialize
Write
(1) ND0FSPR: Set the low pulse width.
(2) ND0FIMR: Set 0x81 if interrupt is required.
(1) ND0FMCR:
(2) Write 512 bytes
(3) Read ECC data
The initialize sequence is as follows.
The write sequence is as follows.
ND0FMCR:
ND0FDTR:
ND0FMCR:
ND0FDTR:
ND0FMCR:
ND0FDTR:
ND0FMCR:
NDECCRD:
(Release interrupt mask)
First data:
Second data:
Third data:
Fourth data:
Fifth data:
Sixth data:
92CH21-397
Set 0x7C for ECC data reset.
Set 0x9D for NDCLE signal enable and command mode.
Set 0x80 for the serial data input command.
Set 0x9E for NDALE signal enable and address mode.
Write address. Set A [7:0], A [16:9], and A [24:17]. If it is
required, set A [25].
Set 0xBC for the data mode.
Write 512 bytes data.
Set 0xDC for the ECC data read mode.
Read 6 bytes ECC data.
LPR [7:0]
LPR [15:8]
CPR [5:0], 2’b11
LPR [23:16]
LPR [31:24]
CPR [11:6], 2’b11
TMP92CH21
2009-06-19

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