TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 376

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

3.14.6.5 Program Example
•
function for soft start in setting of display data.
Assign external column driver to LCDC1 and row driver to LCDC4.
This example uses LD instruction in setting of instruction and micro DMA burst
; ********Setting for LCDC*********
; ********Setting for mode of LCDC0/LCDR0*********
; ********Setting for micro DMA and INTTC (ch0)*********
Setting example: when using 80 segments × 65 commons LCD driver.
When storing 650-byte transfer data to LCD driver.
ld
ld
ld
ld
ld
ldc
ld
ldc
ld
ldc
ld
ldc
ld
ei
ld
ld
(lcdmode0), 00h
(lcdctl0), 00h
(lcdc1l), xx
(lcdc4l), xx
a, 08h
dmam0, a
wa, 650
dmac0, wa
xwa, 002000h
dmas0, xwa
xwa, 1fe1h
dmad0, xwa
(intetc01), 06H
6
(dmab), 01h
(dmar), 01h
92CH21-374
; Select RAM mode
; MMULCD = 0 (Sequential access mode)
; Setting instruction for LCDC1
; Setting instruction for LCDC4
; Source address INC mode
;
; Count = 650
;
; Source address = 002000H
;
; Destination address = 1FE1H (LCDC0H)
;
; INTTC0 level = 6
;
; Burst mode
; Soft start
TMP92CH21
2009-06-19