TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 92

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
3.5.11
individually for input or output. Resetting sets port C to an input port.
output pin for timers (TA1OUT, TA3OUT and TB0OUT0), input pin for external
interruption (INT0 to INT3), output pin for memory (
output pin for LCD driver (LDIV, LCP1). These settings are made using the function
register PCFC. The edge select for external interruption is determined by the IIMC register
in the interruption controller.
(1) PC0 (INT0, TA1OUT)
Port C (PC0 to PC3, PC6 to PC7)
PC0 to PC3, PC6 and PC7 are 6-bit general-purpose I/O ports. Each bit can be set
In addition to functioning as a general-purpose I/O port, port C can also function as an
TA1OUT
INT0
Direction control
Function control
Output latch
PCCR write
PCFC write
PC read
PC write
Reset
S
Figure 3.5.26 Port C0
92CH21-90
A
B
IIMC<I0LE, I0EDGE>
Selector
Selector
Rising/falling select
Level/edge select
S
S
B
A
and
CSZF
), output pin for key (KO8) and
PC0 (INT0,
TA1OUT)
TMP92CH21
2009-06-19

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