TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 254
TMP92xy21FG
Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY21FG.pdf
(544 pages)
Specifications of TMP92xy21FG
Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
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(c) Control transfer type
(c-1) Setup stage
transactions. The UDC executes each transaction while managing three stages in
hardware. Control transfer has the 3 types given below depending on whether
there is data stage or not, and on direction.
3.10.8.
and vendor request must have an intervening CPU controlling the UDC.
CPU.
becomes SETUP.
Control transfer type is configured in the three stages below.
Data stage is sometimes skipped. Each stage is configured in one or several
The 3 transfer sequences are shown in Figure 3.10.6, Figure 3.10.7 and Figure
The UDC automatically answers standard requests in hardware. Class request
Below is the control flow in the UDC and the control flow in the intervening
Setup stage is the same as transmission bulk transaction except that token ID
However, control flow in the UDC is different.
Below is the control flow in the UDC when SETUP token is received.
Control flow
•
•
•
•
•
•
•
•
•
and FIFO condition. However, in SETUP stage, STATUS is returned to
READY and accessing from the CPU to FIFO is always prohibited, and
internal FIFO of endpoint 0 is cleared. It also prepares for following
dataphase.
Device request as received, and accessing from the CPU to EP0 is enabled.
has not finished normally.
1.
2.
State returns to IDLE only if it is INVALID state.
In bulk transfer mode, receiving data is enabled by STATUS registers value
If the CPU accesses Setup Received registers in the UDC, it recognizes
This function is for receiving a new request when the current device request
Setup stage
Data stage
Status stage
Control read transfer type
Control write transfer type
Control write transfer type (No data stage)
Token: SETUP
Data: DATA 0
Handshake: ACK
SETUP token packet is received and address, endpoint number and error
are confirmed. It also checks whether the relevant endpoint is in control
transfer mode.
STATUS register state is confirmed.
92CH21-252
TMP92CH21
2009-06-19
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