upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 144
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 4
144
Reconfiguration of
SSCG registers
4.2.2 SSCG control registers
This section describes the registers used for controlling the spread spectrum
Clock Generator SSCG.
For modulating the SSCG output clock it’s dithering mode must be enabled by
CKC.DEN = 1.
The SSCG control registers SCFC0, SCFC1 and SCFMC can only be rewritten
with new settings if the SSCG is switched off, i.e. if
• the SSCG is disabled by CKC.SCEN = 0
• the SSCG is safely switched off after a power save mode wake-up. Refer to
During operation of the SSCG the registers may only be rewritten with the
values, they already have.
Preliminary User’s Manual U17566EE1V2UM00
“CPU operation after power save mode release” on page 181 for a
procedure to ensure that the SSCG is switched off after wake-up.
Clock Generator
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