upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 286
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 7
286
Figure 7-12
A[23:0] (output)
Note
CSk (output)
WAIT (input)
D[31:0] (I/O)
WR (output)
RD (output)
(2)
BCLK
Write with address setup wait and idle state insertion
Timing: write data with address setup wait and idle state insertion
Register settings:
• BCTm.BTk0 = 0 (connected external device is SRAM or external I/O)
• ASC.ACk[1:0] = 01
• DWCm.DWk[2:0] = 000
• BCC.BCk[1:0] = 01
1.
2.
The data has to be stable at the rising edge of the WR signal. For details refer
to the Electrical Target Specification.
Preliminary User’s Manual U17566EE1V2UM00
The circles indicate the sampling timing.
The broken line indicates the high-impedance state (bus is not driven).
TASW
B
B
(one address setup wait state inserted)
(one idle state inserted)
B
T1
(no programmable data wait states inserted)
Address
Bus and Memory Control (BCU, MEMC)
T2
Data
TI
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