upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 220

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 5
220
Figure 5-10
5.5.1 Operation
Note
5.5 Software Exception
A software exception is generated when the CPU executes the TRAP
instruction, and can be always acknowledged.
If a software exception occurs, the CPU performs the following processing, and
transfers control to the handler routine:
(1)
(2)
(3)
(4)
(5)
Figure 5-10 illustrates the processing of a software exception.
Software exception processing
TRAP Instruction Format: TRAP vector (the vector is a value from 0 to 1FH.)
The handler address is determined by the TRAP instruction’s operand (vector).
If the vector is 0 to 0FH, it becomes 00000040H, and if the vector is 10H to
1FH, it becomes 00000050H.
Preliminary User’s Manual U17566EE1V2UM00
Saves the restored PC to EIPC.
Saves the current PSW to EIPSW.
Writes an exception code to the lower 16 bits (EICC) of ECR (interrupt
source).
Sets the EP and ID bits of the PSW.
Sets the handler address (00000040H or 00000050H) corresponding to
the software exception to the PC, and transfers control.
CPU processing
EIPC
EIPSW
ECR.EICC
PSW.EP
PSW.ID
PC
Exception processing
TRAP instruction
restored PC
PSW
exception code
1
1
handler address
Interrupt Controller (INTC)
Note