upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 838
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
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Chapter 23
838
LBCTL0.BYF0
LBCTL0.TPF0
LBDATA0
DBD[7:0]
INTLCD
SPCLK
DBWR
DBRD
Figure 23-6
Sequence
23.3.4 Reading from the LCD bus
Note
(1)
Dummy read word from LBDATA0 register
You can read from the LCD bus in word, halfword, or byte format. The following
shows typical sequences of reading words and bytes.
Reading words
Reading a word requires the transmission of four bytes.
Timing (mod80: LBTCTL0.IMD0 = 0): read word, LBWST0.WST0 = 5,
LBCYC0.CYC0 = 8, LBTCTL0.TCIS0 = 0
The timing diagrams are for functional explanation purposes only without any
relevance to the real hardware implementation.
1. A dummy read to the LBDATA0 register starts the transfer of four bytes
2. When the last of the four bytes is sampled and the complete word is
3. A following read to the LBDATA0 register provides the LCD controller data
Preliminary User’s Manual U17566EE1V2UM00
from the external LCD controller. The busy flag LBCTL0.BYF0 is set
immediately. The “transfer in progress” flag LBCTL0.TPF0 is set on the
rising edge of the clock.
The data that is read from LBDATA0 belongs to a previous transfer and
may be ignored.
available in the LBDATA0 register, the busy flag LBCTL0.BYF0 is cleared.
The LBCTL0.TPF0 flag remains set until the cycle time of the last byte has
elapsed.
and initiates a new transfer.
Byte0
sample point
Byte1
Byte2
Read word from LBDATA0 register
LCD Bus Interface (LCD-I/F)
Byte3
Word (Byte0..Byte3)
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