upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 789
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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A/D Converter (ADC)
A/D
conversion
ADCR0n
Figure 20-9
INTAD
(ANIn conversion start)
ADA0S
(5)
(6)
rewriting
Interrupt request flag (ADIF)
The interrupt request flag (ADIF) is not cleared even if the contents of the
ADA0S register are changed. If the analog input pin is changed during A/D
conversion, therefore, the result of converting the previously selected analog
input signal may be stored and the conversion end interrupt request flag may
be set immediately before the ADA0S register is rewritten. If the ADIF flag is
read immediately after the ADA0S register is rewritten, the ADIF flag may be
set even though the A/D conversion of the newly selected analog input pin has
not been completed. When A/D conversion is stopped, clear the ADIF flag
before resuming conversion.
Generation timing of A/D conversion end interrupt request
Reading ADCR0n register
When the ADA0M0 to ADA0M2 or ADA0S register is written, the contents of
the ADCR0n register may be undefined. Read the conversion result after
completion of conversion and before writing to the ADA0M0 to ADA0M2 and
ADA0S registers. The correct conversion result may not be read at a timing
different from the above.
Preliminary User’s Manual U17566EE1V2UM00
ANIn
(ANIm conversion start)
ANIn
ANIn
ADA0S
rewriting
ANIn
ANIm
ADIF is set, but ANIm
conversion does not end
ANIm
ANIm
Chapter 20
ANIm
789
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