upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 880
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
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Chapter 28
880
Bit position
Security disable
0
Initial Value
Table 28-1
Address
Access
Bit name
DIS
(1)
The entire ID code, i.e. also the security bit 7 of address 0000 0079
made temporarily ineffective by software. This is achieved by setting the
control bit RSUDISC.DIS = 1. Setting RSUDISC.DIS = 1 does not change the
security bit. Thus after a Power-On-Clear reset the N-Wire security is effective
again.
The N-Wire security function can not be suspended when the microcontroller
is operating in N-Wire debug mode.
RSUDISC- N-Wire security disable control register
The 8-bit RSUDISC register is used to temporarily disable the N-Wire security
function.
This register can be read/written in 8-bit or 1-bit units.
Writing to this register is protected by a special sequence of instructions.
Please refer to “RSUDISCP - RSUDISC write protection register” on page 881
for details.
FFFF F9E0
00
RSUDISC register contents
RSUDISC.DIS can not be changed, while the microcontroller is operating in
N-Wire debug mode, i.e. while the concerned ports are operating as N-Wire
debug pins (OCDM.OCDM0 = 1).
Thus proceed as follows to
• enable N-Wire debugging (from status OCDM.OCDM0 = 0):
• disable N-Wire debugging (from status OCDM.OCDM0 = 1):
Preliminary User’s Manual U17566EE1V2UM00
H
– set RSUDISC.DIS = 1 (disable N-Wire security)
– set OCDM.OCDM0 = 1 (ports are N-Wire pins)
– set OCDM.OCDM0 = 0 (ports are not N-Wire pins)
– set RSUDISC.DIS = 0 (ensable N-Wire security)
. This register is cleared by Power-On-Clear reset.
R
7
0
Function
N-Wire security function disable:
0: N-Wire security function enabled.
1: N-Wire security function disabled.
H
.
R
6
0
R
5
0
R
4
0
R
3
0
R
2
0
On-Chip Debug Unit
R
1
0
H
, can be
R/W
DIS
0
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