upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 481
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Watch Timer (WT)
Chapter 14
(3)
Operation of WCT
The third counter WCT is used for clock correction. This counter is connected
to PCLK1 (8 MHz) or directly to the 4 MHz main oscillator. It is used to
measure the time between two INTWT0UV requests.
For this measurement, WCT is configured as a capture timer.
Once it is enabled, the WCT counter is increased with every rising edge of its
clock. When the value FFFF
is reached, the counter sets a flag and restarts
H
with 0000
.
H
The interrupt INTWT0UV from counter WT0 triggers the capture operation. At
every INTWT0UV, the count value is captured, and the interrupt INTTM00 is
generated. From the counter difference between two consecutive capture
events, the accuracy of the WTCLK can be measured, and WT0 or WT1,
respectively, can be corrected.
The WCT can be programmed to restart counting after the capture operation.
Note
The WCT detects the valid edge of INTWT0UV by sampling its input signal
(the INTWT0UV interrupt line) with WCTCLK. The capture operation is only
performed if the same level after a valid edge is detected two times in series.
As a consequence, the time interval measurement will only work correctly if
f
< f
/ 2.
WTCLK
WCTCLK
Preliminary User’s Manual U17566EE1V2UM00
481
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