upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 768

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 19
768
19.18.1 Wake-up from sleep mode
19.18 Operating Precautions
(1)
(2)
Description
When the CAN macro is set into SLEEP mode, it can be waken up by CAN bus
activity.
This waking up is asynchronous to the operation of the macro and the CPU. By
configuration setting, a WAKEUP interrupt can be generated by the CAN
macro on the wakeup event.
While the interrupt is generated asynchronously, the CAN macro may need
another dominant edge on the CAN bus, in order to restart its synchronous
operation. The necessity of another dominant edge on the CAN bus to wake up
depends on the phase between internal clocking of the CAN macro and the
signal on the CAN bus.
During the time, after the interrupt already has been indicated, and before the
CAN macro has restarted its synchronous operation, the registers of the CAN
macro will not operate.
The worst case (maximum length) of this latency time is given by the CAN bus
speed and the rule of the CAN bus about the frequency of recessive to
dominant edges. Given by the stuffing rule, at least every 10 bits, a recessive
to dominant edge must occur.
This means in an example:
• CAN Bus Speed: 1 Mbit/s
Software improvement hint
Within the WAKEUP interrupt routine, create a waiting loop, which tests the
capability of clearing the WAKEUP interrupt flag within CAN, by checking the
actual power save mode.
In the following C-code example, replace the objects in “<>” brackets by the
hardware locations within your implementation. Use the appropriate access
types, as described in the user’s manual.
do
{
} while( AFCAN_SleepStatus != 0 );
Preliminary User’s Manual U17566EE1V2UM00
10 CAN Bits within: 10 µs
Worst case wakeup latency: 10 µs
AFCAN_SleepStatus = <CnCTRL_PSMODE>
if( AFCAN_SleepStatus != 0 )
{
}
/* macro is still in SLEEP mode (waiting for latency time) */
<CnINTS_CINTS5> = 1; /* repeated trying to clear CINTS5 */
CAN Controller (CAN)