80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 100

• Manufacturer Part Number: 80ksbr200
• Description: Srio Serial Buffer Flow-control Device
• Manufacturer: Integrated Device Technology

„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
Notes
8.2.17 Missing Packet Address Logging Register 2
Packet Programmable Flag Register
8.3 SerB Error Counter Registers
8.3.1 S-Port Data Packet Received Counter
reset by reading. The counter will count every data packet entering the port. Upon reaching full count, the packets will
remain at full count and will not wrap.
8.3.2 S-Port Data Packet Transmitted Counter
counter is reset by reading. The counter will count every data packet leaving the port. Upon reaching full count, the packets
will remain at full count and will not wrap.
8.3.3 S-Port Priority Packet Received Counter
is reset by reading. The counter will count every priority packet entering the port. Upon reaching full count, the packets will
remain at full count and will not wrap.
Note:
Name:
Name:
Name:
This register is identical to the
As part of the device error management, there is a data packet received counter associated with S-Port. This counter is
As part of the device error management, there is a data packet transmitted counter associated with S-Port. This
As part of the device error management, there is a priority packet received counter associated with S-Port. This counter
Bit
30:0
31
Bit
31:0
Bit
31:0
30:0)
MISS_PKT_LOG_2
DATA_PKT_RCV_CNT
DATA_PKT_XMT_CNT
Field Name
MIS_PKT_LOG_2
-
Field Name
SDP_RX_CNT
Field Name
SDP_TX_CNT
The address of the next valid packet following a missing packet is loaded into this register whenever the
missing packet flag is toggled. When either the Missing Packet Flag register is read and cleared, this
register will also clear.
Table 77 Missing Packet Address Logging Register for TI DSP
Missing Packet Address Logging Register
Type
Note
Type
RW
Type
RW
Table 79 S-Port Data Packet Transmitted Counter
” instead of the “
Table 78 S-Port Data Packet Received Counter
100 of 172
Address:
Address:
Address:
Reset
Value
31h0
0
Reset
Value
32h0
Reset
Value
32h0
Missing Packet Flag Register
0x19F20
0x185DC
0x185E0
Comment
Missing Packet Address Log for TI DSP:
The address of the first valid packet following a missing packet
Reserved
Comment
S-Port Data Packet Received Counter:
Reset 0 by reading
Comment
S-Port Data Packet Transmitted Counter:
Reset 0 by reading
, except it is associated with the “
”.
Advanced Datasheet*
March 19, 2007
Missing