80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 81

• Manufacturer Part Number: 80ksbr200
• Description: Srio Serial Buffer Flow-control Device
• Manufacturer: Integrated Device Technology

„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
Notes
Logical/Transport Layer Address Capture CSR
enable bit is set. LTLACCSR is stored in each port and the Message Unit, although the values in this register can differ
between each port and Message Unit. The Message Unit LTLACCSR cannot lock if any port has locked; no port
LTLACCSR can lock if the Message Unit or any other port has locked. Undefined results will occur if this register is written
while actual Logical/Transport Layer errors are being detected by the port.
Logical/Transport Layer Device ID Capture CSR
enable bit is set. LTLDIDCSR is stored in each port and the Message Unit, although the values in this register can differ
between each port and Message Unit. The Message Unit LTLDIDCSR cannot lock if any port has locked; no port
LTLDIDCSR can lock if the Message Unit or any other port has locked. Undefined results will occur if this register is written
while actual Logical/Transport Layer errors are being detected by the port.
Note:
Note:
Name:
Name:
This register contains error information. It is locked when a Logical/Transport error is detected and the corresponding
This register contains error information. It is locked when a Logical/Transport error is detected and the corresponding
1:0
2
31:3
7:0
15:8
23:16
31:24
Bit
Bit
1.
1.
LTL_ADDR_CAP_CSR
LTL_DEV_ID_CSR
The above register is described in the RIO Specification Part 8, sec. 2.3.2.5
The above register is described in the RIO Specification Part 8, sec. 2.3.2.6
EXTA
-
ADDR
SRC_ID
MSB_SRC_ID
DST_ID
MSB_DST_ID
Field Name
Field Name
Table 39 Logical/Transport Layer Device ID Capture CSR
Table 38 Logical/Transport Layer Address Capture CSR
2b00
0
All 0s
0x00
0x00
0x00
0x00
Reset
Value
Reset
Value
81 of 172
Address:
Address:
xamsbs:
Extended address bits of the address associated with the error (for
requests, for responses if available).
Reserved.
address[32:60]:
Least significant 29 bits of the address associated with the error (for
requests, for responses if available).
Source ID:
The sourceID (or least significant byte of the source ID if large trans-
port system) associated with the error.
MSB Source ID:
The most significant byte of the sourceID associated with the error.
This field is valid only if bit 27 of the Processing Element Features
CAR is set (large transport systems only).
Destination ID:
The destinationID (or least significant byte of the destination ID if
large transport system) associated with the error.
MSB Destination ID:
The most significant byte of the destinationID associated with the
error. This field is valid only if bit 27 of the Processing Element Fea-
tures CAR is set (large transport systems only).
0x000614
0x000618
Comment
Comment
Advanced Datasheet*
March 19, 2007